In English

The task migration and cache miss behavior in a symmetric multiprocessor system

Magnus Barse
Göteborg : Chalmers tekniska högskola, 2001.
[Examensarbete på avancerad nivå]

A feature in modern operating systems is the ability to switch between programs so they appear to run concurrently. The feature tends to cancel out some of the benefits from caches. When a program is restarted on the processor it has to reload contents to the caches from the slower memory. The problem can be even worse on multiprocessor systems when a program can be migrated to another processor whose cache contents are totally unrelated. How much does the feature cost in extra execution time due to an increased number of cache misses? In this thesis I have explored the use of a complete workstation simulation to measure cache miss behavior due to task restart and task migration. I have created a test bed that gives the opportunity to monitor the program execution in detail. The simulator runs real programs and a real operating system on top of the simulated hardware. In the test bed the simulator is configured and changes are made so that cache misses and context switches are detected. Two experiments are performed, one for evaluating the cost of restart and migration and the other for finding when migration and cache misses occur. My results give exact values in cycles for restart and migration costs. The cache misses are monitored down to the cycle and from that a graph is derived that shows when and where a program executes and when it generates the cache misses. The test bed seems to produce valid results and is a good companion when trying to understand the execution of a program or system.

Nyckelord: context switch, preemption, migration, symmetric multiprocessor, SMP



Publikationen registrerades 2006-08-25. Den ändrades senast 2013-04-04

CPL ID: 42

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