In English

Implementing stereoscopic video processing on FPGA

Ástvaldur Hjartarson ; Klas Nordmark
Göteborg : Chalmers tekniska högskola, 2015. 67 s.
[Examensarbete på avancerad nivå]

The purpose of this thesis is to investigate the viability of using FPGA acceleration in the processing of a stereoscopic video feed. This is done by comparing speed for a given processing resolution with a software implementation, as well as investigating power and area usage. The processing performed include greyscaling, remapping, resizing, Gaussian blur and Sobel filtering. Methods for disparity map calculations are also investigated. A system capable of processing video at 60 stereo frame pairs per second was developed.

Nyckelord: computer vision, FPGA, video, image processing, disparity, stereoscopy

Publikationen registrerades 2015-07-06. Den ändrades senast 2015-07-06

CPL ID: 219423

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