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Implementing a PCI-Express AMBA interface controller on a Spartan6 FPGA

Anandhavel Sakthivel
Göteborg : Chalmers tekniska högskola, 2013. 40 s.
[Examensarbete på avancerad nivå]

The Purpose of this Master thesis is to integrate the Xilinx PCI-Express interface core to the GRLIB framework. Xilinx Spartan6 Endpoint block for PCI-EXPRESS is generated using Coregen and integrated with the GRLIB framework. The design accounts for crossing clock domains as it is inevitable in a system of chip design with multiple components running at different frequencies. The implementation satisfies the Specification provided by AMBA and PCI-EXPRESS. The performance and area requirement are taken into consideration and different forms of the design is implemented in order to address it. The communication between PC and GRLIB memory environment and the other way around is performed and verified. Simple C codes are developed in order to initiate transfers and also to verify the design. Debugging tools like GRMON, LSPCI and drivers provided by Xilinx are used for analysing and verifying the design. Using GRMON the PCI-EXPRESS debug environment could transfer data at the rate of 120 Mbits/second from PC to the memory of GRLIB. The complete design work was carried out at Aeroflex Gaisler AB.

Nyckelord: LEON3, FPGA, VHDL, Two Process Methodology, DMA, GRLIB, IP core, PCI-EXPRESS, Xilinx, Spartan6.



Publikationen registrerades 2013-05-07. Den ändrades senast 2013-05-07

CPL ID: 176608

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