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Harvard
Holmström, C. och Persson, M. (2010) Transferring MOST data over Ethernet. Göteborg : Chalmers University of Technology
BibTeX
@mastersthesis{
Holmström2010,
author={Holmström, Christoffer and Persson, Martin},
title={Transferring MOST data over Ethernet},
abstract={The purpose of this Master's thesis is to provide a feasibility study of encapsulating and
transmitting data from an FPGA for transfer across Ethernet, with the encapsulation done with a
microcontroller. The data rate required is 53 Mbit/s, specified by the MOST50 standard which will
be the source of the data in the final product. In addition to the streaming capabilities, basic control
functionality should also be implemented. This thesis was initiated by FYI Communication who
already has a product, called MCBuster, whose functionality and performance should be
enhanced.
It was decided that neither TCP nor UDP would be able to fulfill the transport layer requirements
for the project. Therefore, a custom protocol called FYI CETP was developed on top of UDP. For
performance reasons, the entire network protocol stack was developed from the ground up.
To transfer data from the FPGA to the microcontroller fast enough, a parallel interface was used,
called External Peripheral Interface in the Luminary LM3S9B96 microcontroller used. The FPGA, a
Lattice XP2-8, is interfaced in much the same way as an external memory would be, with separate
data and address buses.
For the receiving end of the data stream, a heavily threaded logging and control application called
PCDump was developed using Java.
The project has fulfilled this goal with a broad margin, achieving a sustained transfer rate of 73
Mbit/s.},
publisher={Institutionen för data- och informationsteknik, Datorteknik (Chalmers), Chalmers tekniska högskola},
place={Göteborg},
year={2010},
note={48},
}
RefWorks
RT Generic
SR Electronic
ID 122309
A1 Holmström, Christoffer
A1 Persson, Martin
T1 Transferring MOST data over Ethernet
YR 2010
AB The purpose of this Master's thesis is to provide a feasibility study of encapsulating and
transmitting data from an FPGA for transfer across Ethernet, with the encapsulation done with a
microcontroller. The data rate required is 53 Mbit/s, specified by the MOST50 standard which will
be the source of the data in the final product. In addition to the streaming capabilities, basic control
functionality should also be implemented. This thesis was initiated by FYI Communication who
already has a product, called MCBuster, whose functionality and performance should be
enhanced.
It was decided that neither TCP nor UDP would be able to fulfill the transport layer requirements
for the project. Therefore, a custom protocol called FYI CETP was developed on top of UDP. For
performance reasons, the entire network protocol stack was developed from the ground up.
To transfer data from the FPGA to the microcontroller fast enough, a parallel interface was used,
called External Peripheral Interface in the Luminary LM3S9B96 microcontroller used. The FPGA, a
Lattice XP2-8, is interfaced in much the same way as an external memory would be, with separate
data and address buses.
For the receiving end of the data stream, a heavily threaded logging and control application called
PCDump was developed using Java.
The project has fulfilled this goal with a broad margin, achieving a sustained transfer rate of 73
Mbit/s.
PB Institutionen för data- och informationsteknik, Datorteknik (Chalmers), Chalmers tekniska högskola,PB Institutionen för data- och informationsteknik, Datorteknik (Chalmers), Chalmers tekniska högskola,
LA eng
LK http://publications.lib.chalmers.se/records/fulltext/122309.pdf
OL 30
